发明申请
US20110291163A1 Reduction of Defect Rates in PFET Transistors Comprising a Si/Ge Semiconductor Material Formed by Epitaxial Growth
有权
降低包含由外延生长形成的Si / Ge半导体材料的PFET晶体管的缺陷率
- 专利标题： Reduction of Defect Rates in PFET Transistors Comprising a Si/Ge Semiconductor Material Formed by Epitaxial Growth
- 专利标题（中）： 降低包含由外延生长形成的Si / Ge半导体材料的PFET晶体管的缺陷率
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申请号： US12965118申请日： 2010-12-10
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公开(公告)号： US20110291163A1公开(公告)日： 2011-12-01
- 发明人: Stephan Kronholz , Peter Javorka , Maciej Wiatr , Roman Boschke , Christian Krueger
- 申请人： Stephan Kronholz , Peter Javorka , Maciej Wiatr , Roman Boschke , Christian Krueger
- 申请人地址： KY Grand Cayman
- 专利权人： GLOBALFOUNDRIES INC.
- 当前专利权人： GLOBALFOUNDRIES INC.
- 当前专利权人地址： KY Grand Cayman
- 优先权： DE102010029531.0 20100531
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L21/336
摘要：
In sophisticated semiconductor devices, the defect rate that may typically be associated with the provision of a silicon/germanium material in the active region of P-channel transistors may be significantly decreased by incorporating a carbon species prior to or during the selective epitaxial growth of the silicon/germanium material. In some embodiments, the carbon species may be incorporated during the selective growth process, while in other cases an ion implantation process may be used. In this case, superior strain conditions may also be obtained in N-channel transistors.
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