发明申请
- 专利标题: METHOD FOR OPERATING A NON-VOLATILE LOGIC CIRCUIT
- 专利标题(中): 用于操作非易失性逻辑电路的方法
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申请号: US13221029申请日: 2011-08-30
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公开(公告)号: US20110309859A1公开(公告)日: 2011-12-22
- 发明人: Yukihiro KANEKO
- 申请人: Yukihiro KANEKO
- 申请人地址: JP Osaka
- 专利权人: PANASONIC CORPORATION
- 当前专利权人: PANASONIC CORPORATION
- 当前专利权人地址: JP Osaka
- 优先权: JP2010-108888 20100511
- 主分类号: H03K19/185
- IPC分类号: H03K19/185
摘要:
In a non-volatile logic circuit, a first input electrode and a second input electrode are formed on a semiconductor layer and interposed between an electric current source electrode and an output electrode in a plan view. The semiconductor layer is disposed on a ferroelectric layer. A method of operating the non-volatile logic circuit includes a step of writing one state selected from four states by applying voltages to the first and second input electrode, respectively, a step of measuring current generated by applying the voltage between the electric current source electrode and the output electrode to determine, on the basis of the measured current, which of the high or low resistant state the non-volatile logic circuit has.
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