发明申请
- 专利标题: FIFO BUFFER SYSTEM
- 专利标题(中): FIFO缓冲系统
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申请号: US13222757申请日: 2011-08-31
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公开(公告)号: US20110314190A1公开(公告)日: 2011-12-22
- 发明人: Tetsuya TANAKA
- 申请人: Tetsuya TANAKA
- 申请人地址: JP Osaka
- 专利权人: PANASONIC CORPORATION
- 当前专利权人: PANASONIC CORPORATION
- 当前专利权人地址: JP Osaka
- 优先权: JP2009-106381 20090424
- 主分类号: G06F3/00
- IPC分类号: G06F3/00
摘要:
As a FIFO buffer system, a rewind function is realized without reducing a data transfer rate. Input data is written in a write FIFO buffer, and is packetized by a packetizing FIFO buffer to be written in a buffer memory area formed in a save memory. A multiplexer selects, in a first mode, an output of the write FIFO buffer, and in a second mode, packet data read from the buffer memory area. The multiplexer continuously selects the first mode until the read FIFO buffer becomes full.
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