发明申请
US20110314228A1 Maintaining Cache Coherence In A Multi-Node, Symmetric Multiprocessing Computer
失效
维持多节点对称多处理计算机中的缓存一致性
- 专利标题： Maintaining Cache Coherence In A Multi-Node, Symmetric Multiprocessing Computer
- 专利标题（中）： 维持多节点对称多处理计算机中的缓存一致性
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申请号： US12816464申请日： 2010-06-16
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公开(公告)号： US20110314228A1公开(公告)日： 2011-12-22
- 发明人: Michael A. Blake , Garrett M. Drapala , Pak-Kin Mak , Vesselina K. Papazova , Craig R. Walters
- 申请人： Michael A. Blake , Garrett M. Drapala , Pak-Kin Mak , Vesselina K. Papazova , Craig R. Walters
- 申请人地址： US NY Armonk
- 专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址： US NY Armonk
- 主分类号： G06F12/08
- IPC分类号： G06F12/08 ; G06F12/00
摘要：
Maintaining cache coherence in a multi-node, symmetric multiprocessing computer, the computer composed of a plurality of compute nodes, including, broadcasting upon a cache miss by a first compute node a request for a cache line; transmitting from each of the other compute nodes to all other nodes the state of the cache line on that node, including transmitting from any compute node having a correct copy to the first node the correct copy of the cache line; and updating by each node the state of the cache line in each node, in dependence upon one or more of the states of the cache line in all the nodes.
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