发明申请
US20120001254A1 Transistor With Embedded Si/Ge Material Having Reduced Offset and Superior Uniformity
有权
具有嵌入式Si / Ge材料的晶体管具有降低的偏移和优异的均匀性
- 专利标题: Transistor With Embedded Si/Ge Material Having Reduced Offset and Superior Uniformity
- 专利标题(中): 具有嵌入式Si / Ge材料的晶体管具有降低的偏移和优异的均匀性
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申请号: US13006148申请日: 2011-01-13
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公开(公告)号: US20120001254A1公开(公告)日: 2012-01-05
- 发明人: Stephan Kronholz , Peter Javorka , Roman Boschke
- 申请人: Stephan Kronholz , Peter Javorka , Roman Boschke
- 申请人地址: KY Grand Cayman
- 专利权人: GLOBALFOUNDRIES INC.
- 当前专利权人: GLOBALFOUNDRIES INC.
- 当前专利权人地址: KY Grand Cayman
- 优先权: DE102010030768.8 20100630
- 主分类号: H01L29/78
- IPC分类号: H01L29/78 ; H01L21/8238
摘要:
In sophisticated semiconductor devices, a strain-inducing embedded semiconductor alloy may be provided on the basis of a crystallographically anisotropic etch process and a self-limiting deposition process, wherein transistors which may not require an embedded strain-inducing semiconductor alloy may remain non-masked, thereby providing superior uniformity with respect to overall transistor configuration. Consequently, superior strain conditions may be achieved in one type of transistor, while generally reduced variations in transistor characteristics may be obtained for any type of transistors.
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