发明申请
US20120018786A1 HIGHLY STRAINED SOURCE/DRAIN TRENCHES IN SEMICONDUCTOR DEVICES
审中-公开
半导体器件中的高应变源/漏极宽度
- 专利标题: HIGHLY STRAINED SOURCE/DRAIN TRENCHES IN SEMICONDUCTOR DEVICES
- 专利标题(中): 半导体器件中的高应变源/漏极宽度
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申请号: US13251961申请日: 2011-10-03
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公开(公告)号: US20120018786A1公开(公告)日: 2012-01-26
- 发明人: Ta-Wei KAO , Shiang-Bau WANG , Ming-Jie HUANG , Chi-Hsi WU , Shu-Yuan KU
- 申请人: Ta-Wei KAO , Shiang-Bau WANG , Ming-Jie HUANG , Chi-Hsi WU , Shu-Yuan KU
- 申请人地址: TW Hsin-Chu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L29/78
- IPC分类号: H01L29/78
摘要:
A semiconductor device is formed by a multi-step etching process that produces trench openings in a silicon substrate immediately adjacent transistor gate structures formed over the substrate surface. The multi-step etching process is a Br-based etching operation with one step including nitrogen and a further step deficient of nitrogen. The etching process does not attack the transistor structure and forms the openings. The openings are bounded by upper surfaces that extend downwardly from the substrate surface and are substantially vertical, and lower surfaces that bulge outwardly from the upper vertical sections and undercut the transistor structure. The openings may be filled with a suitable source/drain material to produce SSD transistors with desirable Idsat characteristics.
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