发明申请
- 专利标题: METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
- 专利标题(中): 制造半导体器件的方法
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申请号: US13244455申请日: 2011-09-24
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公开(公告)号: US20120021578A1公开(公告)日: 2012-01-26
- 发明人: Yoshito Nakazawa , Hitoshi Matsuura
- 申请人: Yoshito Nakazawa , Hitoshi Matsuura
- 专利权人: RENESAS ELECTRONICS CORPORATION
- 当前专利权人: RENESAS ELECTRONICS CORPORATION
- 优先权: JP2006-354339 20061228
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A trench gate type power transistor of high performance is provided. A trench gate as a gate electrode is formed in a super junction structure comprising a drain layer and an epitaxial layer. In this case, the gate electrode is formed in such a manner that an upper surface of the epitaxial layer becomes higher than that of a channel layer formed over the drain layer. Then, an insulating film is formed over each of the channel layer and the epitaxial layer and thereafter a part of the insulating film is removed to form side wall spacers over side walls of the epitaxial layer. Subsequently, with the side wall spacers as masks, a part of the channel layer and that of the drain layer are removed to form a trench for a trench gate.
公开/授权文献
- US08187941B2 Method of manufacturing semiconductor device 公开/授权日:2012-05-29
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