A test device is provided. The test device includes a first via which transmits a supply voltage, a second via which transmits a ground voltage, a test board including a plurality of test signal vias for transmitting a plurality of test signals, a capacitor disposed on an upper part of the test board and connected between the first via and the second via, and a test socket which electrically connects a device under test (DUT) with the test board. The test socket includes a first region including a flat lower surface bordering the test board, a second region including an uneven lower surface, a plurality of first contactors which are disposed in the first region and which are connected to the plurality of vias, and two second contactors which are disposed in the second region and which are connected to two terminals of the capacitor.