Invention Application
- Patent Title: METHODS OF FORMING A GATE STRUCTURE AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME
- Patent Title (中): 形成门结构的方法和使用其制造半导体器件的方法
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Application No.: US13195521Application Date: 2011-08-01
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Publication No.: US20120034752A1Publication Date: 2012-02-09
- Inventor: Weon-Hong KIM , Hyung-Suk Jung , Ha-Jin Lim
- Applicant: Weon-Hong KIM , Hyung-Suk Jung , Ha-Jin Lim
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd
- Current Assignee: Samsung Electronics Co., Ltd
- Current Assignee Address: KR Suwon-si
- Priority: KR10-2010-0074849 20100803
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/02

Abstract:
In a method of forming a gate structure, a gate pattern including a gate insulation layer pattern and a gate electrode sequentially stacked on a substrate is formed. The gate electrode includes a metal. A first plasma process is performed on the gate pattern using a reaction gas to reduce an oxidized edge portion of the gate electrode. The reaction gas includes nitrogen. A spacer is formed on a sidewall of the gate pattern. A threshold voltage is adjusted by reducing the oxidized edge portion of the gate electrode. Therefore, a semiconductor device including the gate pattern has excellent electrical characteristics.
Information query
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