发明申请
- 专利标题: DYNAMIC CACHE REDUCTION UTILIZING VOLTAGE WARNING MECHANISM
- 专利标题(中): 动态缓存使用电压警告机制
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申请号: US12852153申请日: 2010-08-06
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公开(公告)号: US20120036328A1公开(公告)日: 2012-02-09
- 发明人: Poh Guat Bay , Chee Meng Leong , Choon Wei Ng , June Christian Ang , Kian Keong Ooi , Wei Kin Wan
- 申请人: Poh Guat Bay , Chee Meng Leong , Choon Wei Ng , June Christian Ang , Kian Keong Ooi , Wei Kin Wan
- 申请人地址: US CA Scotts Valley
- 专利权人: SEAGATE TECHNOLOGY LLC
- 当前专利权人: SEAGATE TECHNOLOGY LLC
- 当前专利权人地址: US CA Scotts Valley
- 主分类号: G06F12/08
- IPC分类号: G06F12/08
摘要:
An interface controller of a storage device configured to manage a write cache of the storage device responsive to changes in a voltage supply provided to the storage device. In one implementation, the interface controller reduces the size of the write cache responsive to the voltage supply dropping at or below a first threshold. The interface controller further disables write permissions to the write cache responsive the voltage supply dropping at or below a second threshold, wherein the second threshold is lower in magnitude that the first threshold. The interface controller periodically receives the voltage supply responsive to transmitting sequential requests to a servo firmware of the storage device.
公开/授权文献
- US08631198B2 Dynamic cache reduction utilizing voltage warning mechanism 公开/授权日:2014-01-14
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