发明申请
US20120038053A1 Semiconductor Device and Method of Forming FO-WLCSP Having Conductive Layers and Conductive Vias Separated by Polymer Layers
有权
半导体器件和形成具有由聚合物层分离的导电层和导电通孔的FO-WLCSP的方法
- 专利标题： Semiconductor Device and Method of Forming FO-WLCSP Having Conductive Layers and Conductive Vias Separated by Polymer Layers
- 专利标题（中）： 半导体器件和形成具有由聚合物层分离的导电层和导电通孔的FO-WLCSP的方法
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申请号： US12857362申请日： 2010-08-16
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公开(公告)号： US20120038053A1公开(公告)日： 2012-02-16
- 发明人: JiHoon Oh , SinJae Lee , JinGwan Kim
- 申请人： JiHoon Oh , SinJae Lee , JinGwan Kim
- 申请人地址： SG Singapore
- 专利权人： STATS CHIPPAC, LTD.
- 当前专利权人： STATS CHIPPAC, LTD.
- 当前专利权人地址： SG Singapore
- 主分类号： H01L23/52
- IPC分类号： H01L23/52 ; H01L21/768 ; H01L21/50
摘要：
A Fo-WLCSP has a first polymer layer formed around a semiconductor die. First conductive vias are formed through the first polymer layer around a perimeter of the semiconductor die. A first interconnect structure is formed over a first surface of the first polymer layer and electrically connected to the first conductive vias. The first interconnect structure has a second polymer layer and a plurality of second vias formed through the second polymer layer. A second interconnect structure is formed over a second surface of the first polymer layer and electrically connected to the first conductive vias. The second interconnect structure has a third polymer layer and a plurality of third vias formed through the third polymer layer. A semiconductor package can be mounted to the WLCSP in a PoP arrangement. The semiconductor package is electrically connected to the WLCSP through the first interconnect structure or second interconnect structure.
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