发明申请
US20120044220A1 METHOD OF FORMING MULTILAYER CONDUCTOR LINE, AND ELECTRONIC PAPER PANEL USING THE SAME
审中-公开
形成多层导体线的方法和使用它的电子纸板
- 专利标题: METHOD OF FORMING MULTILAYER CONDUCTOR LINE, AND ELECTRONIC PAPER PANEL USING THE SAME
- 专利标题(中): 形成多层导体线的方法和使用它的电子纸板
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申请号: US12962237申请日: 2010-12-07
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公开(公告)号: US20120044220A1公开(公告)日: 2012-02-23
- 发明人: Jae Chan LEE , Hyun Hak Kim , Gi Young Byun
- 申请人: Jae Chan LEE , Hyun Hak Kim , Gi Young Byun
- 专利权人: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- 当前专利权人: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- 优先权: KR10-2010-0079830 20100818
- 主分类号: G09G5/00
- IPC分类号: G09G5/00 ; H01J9/24
摘要:
Disclosed herein are a method of forming a multilayer conductor line and an electronic paper panel using the same. The electronic paper panel includes a substrate: a lower electrode disposed on the upper portion of the substrate and formed with a wiring layer to electrically connect each of the segments so that it drives an electronic paper; an upper electrode disposed on the upper portion of the lower electrode to display information to be represented; an insulating layer disposed between the upper electrode and the lower electrode; a driving chip mounted on the upper surface of the lower electrode, whereby the conductor lines can be designed in the multilayer structure type at the time of forming the conductor lines of the electronic paper panel, such that it is possible to variously design the conductor lines even though the substrate size is small.