A package embedded with a chip and a method of fabricating the package of embedded chip. The package of embedded chip includes a dielectric layer having a first surface and a second surface opposing the first surface; a plurality of conductive pillars formed in the dielectric layer and exposed from the second surface of the dielectric layer; a chip embedded in the dielectric layer; a circuit layer formed on the first surface of the dielectric layer; a plurality of conductive blind vias formed in the dielectric layer, allowing the circuit layer to be electrically connected via the conductive blind vias to the chip and each of the conductive pillars; and a first solder mask layer formed on the first surface of the dielectric layer and the circuit layer, thereby using conductive pillars to externally connect with other electronic devices as required to form a stacked structure. Therefore, the manufacturing process can be effectively simplified.