发明申请
US20120086120A1 STACKED SEMICONDUCTOR PACKAGE HAVING CONDUCTIVE VIAS AND METHOD FOR MAKING THE SAME
审中-公开
具有导电VIAS的堆叠半导体封装及其制造方法
- 专利标题: STACKED SEMICONDUCTOR PACKAGE HAVING CONDUCTIVE VIAS AND METHOD FOR MAKING THE SAME
- 专利标题(中): 具有导电VIAS的堆叠半导体封装及其制造方法
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申请号: US13253816申请日: 2011-10-05
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公开(公告)号: US20120086120A1公开(公告)日: 2012-04-12
- 发明人: Jen-Chuan Chen , Hui-Shan Chang , You-Cheng Lai
- 申请人: Jen-Chuan Chen , Hui-Shan Chang , You-Cheng Lai
- 申请人地址: TW Kaohsiung
- 专利权人: Advanced Semiconductor Engineering, Inc.
- 当前专利权人: Advanced Semiconductor Engineering, Inc.
- 当前专利权人地址: TW Kaohsiung
- 优先权: TW099134142 20101007
- 主分类号: H01L23/48
- IPC分类号: H01L23/48
摘要:
The present invention relates to a stacked semiconductor package and a method for making the same. The method includes the steps of: forming and curing a first protective layer to cover a plurality of first bumps of a first wafer; cutting the first wafer to form a plurality of first dice; forming a third protective layer to cover a plurality of second bumps of a second wafer; picking up the first dice through the first protective layer, and bonding the first dice to the second wafer; removing part of the first protective layer; cutting the second wafer to form a plurality of second dice; and bonding the first dice and the second dice to a substrate. Whereby, the first protective layer can protect the first bumps, and the first protective layer can increase the total thickness and the flatness.
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