发明申请
US20120102345A1 APPARATUS AND METHOD FOR ADAPTIVE FREQUENCY SCALING IN DIGITAL SYSTEM
有权
数字系统中自适应频率缩放的装置和方法
- 专利标题: APPARATUS AND METHOD FOR ADAPTIVE FREQUENCY SCALING IN DIGITAL SYSTEM
- 专利标题(中): 数字系统中自适应频率缩放的装置和方法
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申请号: US13276503申请日: 2011-10-19
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公开(公告)号: US20120102345A1公开(公告)日: 2012-04-26
- 发明人: Tae-Hong PARK , Ji-Yong YOON , Kang-Min LEE , Yun-Ju KWON , Jong-Hyuck HONG
- 申请人: Tae-Hong PARK , Ji-Yong YOON , Kang-Min LEE , Yun-Ju KWON , Jong-Hyuck HONG
- 申请人地址: KR Suwon-si
- 专利权人: SAMSUNG ELECTRONICS CO. LTD.
- 当前专利权人: SAMSUNG ELECTRONICS CO. LTD.
- 当前专利权人地址: KR Suwon-si
- 优先权: KR10-2010-0102270 20101020
- 主分类号: G06F1/00
- IPC分类号: G06F1/00
摘要:
An apparatus and method for adaptively changing clock frequencies of a Central Processing Unit (CPU) and a bus in a digital system are provided. The system includes an Adaptive Frequency Scaling (AFS) controller and a clock controller. The AFS controller determines whether to change a clock frequency of the CPU according to operation information of the CPU, and determines whether to change a clock frequency of the bus according to operation information of the bus. The clock controller generates a clock frequency of the CPU and a clock frequency of the bus according to the determination of the AFS controller.
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