A multilayer printed wiring board includes a multilayered structure having conductor circuit layers and interlaminar insulative layers, the interlaminar insulative layers including an outermost interlaminar insulative layer, the conductor circuit layers including an outermost conductor circuit layer formed over the outermost interlaminar insulative, a filled-viahole formed in the outermost interlaminar insulative layer and having one or more metal plating fillings and completely closing a hole formed through the outermost interlaminar insulative layer such that the metal plating of the filled-viahole extends out of the hole and forms a substantially flat surface, and solder bumps including a first solder bump formed on the substantially flat surface of the filled-viahole and a second solder bump formed on a surface portion in the outermost conductor circuit layer. The substantially flat surface of the filled-viahole is leveled substantially at the same height as the surface portion of the outermost conductor circuit layer.