A low profile chip scale module and method of making of the same. The low profile chip scale module includes embedded SMD and integrated EM shielding. An adhesive layer is arranged on a substrate, e.g., chip carrier. Dies and SMDs are arranged on the adhesive layer. An etched frame and molding is attached to the substrate. Inputs/outputs (I/O) are formed and the substrate is coated with a dielectric material. Metal lines and connections among bond pads are formed and another layer of dielectric material is applied as a protective layer. The substrate is cut into various predetermined sizes and a lens is attached to form the chip scale module.