The present invention relates an image processing apparatus and method able to realize parallelized or pipelined intra prediction while also improving coding efficiency.An intra prediction unit 74 conducts an intra prediction process on one or more target blocks corresponding to one or more block addresses determined by an address controller 75 in a processing order that differs from the H.264/AVC processing order, in intra prediction modes that use nearby pixels determined to be available by an nearby pixel availability determination unit 76. At this point, the intra prediction unit 74 conducts intra prediction on a plurality of blocks by pipeline processing or parallel processing, or conducts intra prediction on a single block, on the basis of a control signal from a pipeline/parallel processing controller 92. The present invention can be applied to image encoding apparatus that encode in the H.264/AVC format, for example.