Invention Application
US20120133032A1 PACKAGE HAVING ESD AND EMI PREVENTING FUNCTIONS AND FABRICATION METHOD THEREOF
有权
具有ESD和EMI防护功能的封装及其制造方法
- Patent Title: PACKAGE HAVING ESD AND EMI PREVENTING FUNCTIONS AND FABRICATION METHOD THEREOF
- Patent Title (中): 具有ESD和EMI防护功能的封装及其制造方法
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Application No.: US12987613Application Date: 2011-01-10
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Publication No.: US20120133032A1Publication Date: 2012-05-31
- Inventor: Tsung-Hsien Tsai , Chih-Hsien Chiu , Hsin-Lung Chung , Chien-Cheng Lin
- Applicant: Tsung-Hsien Tsai , Chih-Hsien Chiu , Hsin-Lung Chung , Chien-Cheng Lin
- Applicant Address: TW Taichung
- Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Current Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Current Assignee Address: TW Taichung
- Priority: TW099140955 20101126
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L21/78
Abstract:
A package having ESD (electrostatic discharge) and EMI (electromagnetic interference) preventing functions includes: a substrate unit having a ground structure and an I/O structure disposed therein; at least a semiconductor component disposed on a surface of the substrate unit and electrically connected to the ground structure and the I/O structure; an encapsulant covering the surface of the substrate unit and the semiconductor component; and a metal layer disposed on exposed surfaces of the encapsulant and side surfaces of the substrate unit and electrically insulated from the ground structure, thereby protecting the semiconductor component against ESD and EMI so as to improve the product yield and reduce the risk of short circuits.
Public/Granted literature
- US09111945B2 Package having ESD and EMI preventing functions and fabrication method thereof Public/Granted day:2015-08-18
Information query
IPC分类:
