Invention Application
- Patent Title: METHODS OF FORMING INTEGRATED CIRCUITS
- Patent Title (中): 形成集成电路的方法
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Application No.: US13042539Application Date: 2011-03-08
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Publication No.: US20120135575A1Publication Date: 2012-05-31
- Inventor: King-Yuen WONG , Ming-Lung CHENG , Chien-Tai CHAN , Da-Wen LIN , Chung-Cheng WU
- Applicant: King-Yuen WONG , Ming-Lung CHENG , Chien-Tai CHAN , Da-Wen LIN , Chung-Cheng WU
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A method of forming an integrated circuit includes forming a gate structure over a substrate. Portions of the substrate are removed to form recesses adjacent to the gate structure. A dopant-rich layer having first type dopants is formed on a sidewall and a bottom of each of the recesses. A silicon-containing material structure is formed in each of the recesses. The silicon-containing material structure has second type dopants. The second type dopants are opposite to the first type dopants.
Public/Granted literature
- US08357579B2 Methods of forming integrated circuits Public/Granted day:2013-01-22
Information query
IPC分类:
