Invention Application
US20120144272A1 PROBABILISTIC MULTI-TIER ERROR CORRECTION IN NOT-AND (NAND) FLASH MEMORY
有权
非 - 和(NAND)闪存中的概念多层错误校正
- Patent Title: PROBABILISTIC MULTI-TIER ERROR CORRECTION IN NOT-AND (NAND) FLASH MEMORY
- Patent Title (中): 非 - 和(NAND)闪存中的概念多层错误校正
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Application No.: US12960004Application Date: 2010-12-03
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Publication No.: US20120144272A1Publication Date: 2012-06-07
- Inventor: Michele M. Franceschini , Ashish Jagmohan , Luis A. Lastras-Montano , Mayank Sharma
- Applicant: Michele M. Franceschini , Ashish Jagmohan , Luis A. Lastras-Montano , Mayank Sharma
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Main IPC: H03M13/05
- IPC: H03M13/05 ; G06F11/10

Abstract:
Error correction in not-and (NAND) flash memory including a system for retrieving data from memory. The system includes a decoder in communication with a memory. The decoder is for performing a method that includes receiving a codeword stored on a page in the memory, the codeword including data and first-tier check symbols that are generated in response to the data. The method further includes determining that the codeword includes errors that cannot be corrected using the first-tier check symbols, and in response second-tier check symbols are received. The second-tier check symbols are generated in response to receiving the data and to the contents of other pages in the memory that were written prior to the page containing the codeword. The codeword is corrected in response to the second-tier check symbols. The corrected codeword is output.
Public/Granted literature
- US08464137B2 Probabilistic multi-tier error correction in not-and (NAND) flash memory Public/Granted day:2013-06-11
Information query
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