In some embodiments, an apparatus implemented in a memory and/or a processing device includes a first network control entity to manage a first data plane module associated with a port from a set of ports at a first access switch. The first network control entity associates an identifier of a peripheral processing device operatively coupled to the port from the set of ports with a next hop reference. The first network control entity provides the next hop reference to a second network control entity that manages a second data plane module at a second access switch such that the second data plane module can append the next hop reference to a data packet when the peripheral processing device is within a data path between and including the second access switch and a destination peripheral processing device.