发明申请
- 专利标题： METHODS AND SYSTEMS FOR FAULT-TOLERANT POWER ANALYSIS
- 专利标题（中）： 用于故障电力分析的方法和系统
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申请号： US12978193申请日： 2010-12-23
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公开(公告)号： US20120166168A1公开(公告)日： 2012-06-28
- 发明人: Vijay Srinivasan
- 申请人： Vijay Srinivasan
- 申请人地址： US CA Redwood City
- 专利权人： ORACLE INTERNATIONAL CORPORATION
- 当前专利权人： ORACLE INTERNATIONAL CORPORATION
- 当前专利权人地址： US CA Redwood City
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
Methods and systems are described which enable a user to conduct a power analysis of a behavior description of a circuit design. The elements of the circuit design are described at the register transfer level and synthesized to a gate-level netlist. Embodiments of the invention allow a user to conduct accurate power analysis during register transfer level to gate-level netlist synthesis.
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