An electronic device and a method for checking layout distance of a printed circuit board (PCB) including presetting a checking condition to determine a reference layer. A high speed signal path is selected from a PCB design file, and a layer where the selected high speed signal path is located can be determined A reference layer of the determined layer is determined according to the checking condition, and a split line of the reference layer is determined. A shortest distance between each segment of the selected high speed signal path and the split line is calculated. If the shortest distance between a segment and the split line is less than the standard distance, layout of the segment is determined to be invalid.