发明申请
- 专利标题： APPARATUS AND METHOD FOR MULTI-LEVEL CACHE UTILIZATION
- 专利标题（中）： 多级高速缓存应用的设备和方法
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申请号： US13450882申请日： 2012-04-19
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公开(公告)号： US20120203960A1公开(公告)日： 2012-08-09
- 发明人: R. Scott Tetrick , Dale Juenemann , Robert Brennan
- 申请人： R. Scott Tetrick , Dale Juenemann , Robert Brennan
- 主分类号： G06F12/08
- IPC分类号： G06F12/08 ; G06F12/02
摘要：
In some embodiments, a non-volatile cache memory may include a multi-level non-volatile cache memory configured to be located between a system memory and a mass storage device of an electronic system and a controller coupled to the multi-level non-volatile cache memory, wherein the controller is configured to control utilization of the multi-level non-volatile cache memory. Other embodiments are disclosed and claimed.
公开/授权文献
- US08386701B2 Apparatus and method for multi-level cache utilization 公开/授权日：2013-02-26
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