A non-volatile memory device includes a substrate including a plurality of active regions and a plurality of device isolating trenches formed between a respective one of each of the active regions along a first direction in the substrate. A plurality of gate structures each including a tunnel insulating layer pattern, a floating gate electrode, a dielectric layer pattern and a control gate electrode is formed on the substrate. A first insulating layer pattern is provided within the device isolating trenches. A second insulating layer pattern is formed along an inner surface portion of a gap between the gate structures. An impurity doped polysilicon pattern is formed on the second insulating layer pattern in the gap between the gate structures.