发明申请
- 专利标题: LDMOS WITH IMPROVED BREAKDOWN VOLTAGE
- 专利标题(中): LDMOS具有改进的断电电压
-
申请号: US13046332申请日: 2011-03-11
-
公开(公告)号: US20120228705A1公开(公告)日: 2012-09-13
- 发明人: Eng Huat Toh , Jae Gon Lee , Chung Foong Tan , Elgin Quek
- 申请人: Eng Huat Toh , Jae Gon Lee , Chung Foong Tan , Elgin Quek
- 申请人地址: SG Singapore
- 专利权人: GLOBALFOUNDRIES Singapore Pte. Ltd.
- 当前专利权人: GLOBALFOUNDRIES Singapore Pte. Ltd.
- 当前专利权人地址: SG Singapore
- 主分类号: H01L29/78
- IPC分类号: H01L29/78 ; H01L21/336
摘要:
An LDMOS is formed with a second gate stack over the n− drift region, having a common gate electrode with the gate stack, and having a higher work function than the gate stack. Embodiments include forming a first conductivity type well, having a source, surrounded by a second conductivity type well, having a drain, in a substrate, forming first and second gate stacks on the substrate over a portion of the first well and a portion of the second well, respectively, the first and second gate stacks sharing a common gate electrode, and tuning the work functions of the first and second gate stacks to obtain a higher work function for the second gate stack. Other embodiments include forming the first gate stack with a first high-k dielectric and the second gate stack with a second high-k dielectric, and forming the first and second gate stacks with asymmetric dielectrics.
公开/授权文献
信息查询
IPC分类: