发明申请
US20120292710A1 METHOD FOR SELF-ALIGNED METAL GATE CMOS 有权
自对准金属栅CMOS的方法

METHOD FOR SELF-ALIGNED METAL GATE CMOS
摘要:
A semiconductor device is formed by first providing a dual gate semiconductor device structure having FET pair precursors, which includes an nFET precursor and a pFET precursor, wherein each of the nFET precursor and the pFET precursor includes a dummy gate structure. At least one protective layer is deposited across the FET pair precursors, leaving the dummy gate structures exposed. The dummy gate structure is removed from one of the nFET precursor and the pFET precursor to create therein one of an nFET gate hole and a pFET gate hole, respectively. A fill is deposited into the formed one of the nFET gate hole and the pFET gate.
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