发明申请
- 专利标题: SEMICONDUCTOR DEVICE HAVING CHIP CRACK DETECTION STRUCTURE
- 专利标题(中): 具有芯片检测结构的半导体器件
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申请号: US13461627申请日: 2012-05-01
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公开(公告)号: US20120292759A1公开(公告)日: 2012-11-22
- 发明人: Toru ISHIKAWA
- 申请人: Toru ISHIKAWA
- 申请人地址: JP Tokyo
- 专利权人: Elpida Memory, Inc.
- 当前专利权人: Elpida Memory, Inc.
- 当前专利权人地址: JP Tokyo
- 优先权: JP2011-111673 20110518
- 主分类号: H01L23/498
- IPC分类号: H01L23/498
摘要:
A device includes a semiconductor substrate, a first penetration electrode and a plurality of second penetration electrodes each penetrating the semiconductor substrate, a first terminal and a plurality of second terminals formed on a one side of the substrate, and a third terminal and a plurality of fourth terminals formed on an opposite side of the substrate. Each of the first and third terminals is vertically aligned with and electrically connected to first penetration electrode. Each of the second terminals is vertically aligned with an associated one of the second penetration electrodes and electrically connected to another one of the second penetration terminals that is not vertically aligned with the associated second terminal. Each of fourth terminals is vertically aligned with and electrically connected to an associated one of the second penetration electrodes.
公开/授权文献
- US08624401B2 Semiconductor device having chip crack detection structure 公开/授权日:2014-01-07
信息查询
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