发明申请
- 专利标题: METHOD OF FORMING CIRCUIT ON FLEXIBLE LAMINATE SUBSTRATE
- 专利标题(中): 在柔性层压基板上形成电路的方法
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申请号: US13577493申请日: 2011-02-04
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公开(公告)号: US20130001186A1公开(公告)日: 2013-01-03
- 发明人: Kazuhiko Sakaguchi , Hajime Inazumi
- 申请人: Kazuhiko Sakaguchi , Hajime Inazumi
- 申请人地址: JP Tokyo
- 专利权人: JX NIPPON MINING & METALS CORPORATION
- 当前专利权人: JX NIPPON MINING & METALS CORPORATION
- 当前专利权人地址: JP Tokyo
- 优先权: JP2010-035863 20100222
- 国际申请: PCT/JP2011/052340 WO 20110204
- 主分类号: H05K3/06
- IPC分类号: H05K3/06
摘要:
Disclosed is a method of forming a circuit on a flexible laminate substrate. When forming a circuit using an adhesiveless flexible laminate which includes a polyimide film as the flexible laminate substrate in which at least one surface thereof is subject to plasma treatment, a tie-coat layer A formed on the polyimide film, a metal conductor layer B formed on the tie-coat layer, and a layer C which has the same components as the tie-coat layer that was formed on the metal conductor layer, the following method is used. The photoresist is coated on the layer C which has the same components as the tie-coat layer that was formed on the metal conductor layer, the photoresist is exposed and developed, the layer C other than the circuit forming parts thereof is selectively removed in advance via pre-etching, the conductor layer B is thereafter removed by supplemental etching with leaving the circuit portion, and the photoresist of the circuit portion is further removed so as to form the circuit. By forming a tie-coat layer or a metal or alloy that is equivalent to the tie-coat layer on the metal conductor layer of the adhesiveless flexible laminate, simultaneously achieved are the inhibition of side etching, which interferes with the achievement of finer pitches of circuit wiring, and the improvement of linearity of the wiring.
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