Provided is an error correction code decoding apparatus capable of performing a decoding process efficiently for various interleaver sizes while suppressing an increase in apparatus size. The error correction code decoding apparatus includes: a simultaneous decoding selection unit configured to select whether a first and a second elementary codes are to be subjected to simultaneous decoding depending on a size of an interleaver; a reception information storage unit configured to store reception information at a position in accordance with a selection result from the simultaneous decoding selection unit; an external information storage unit configured to store external information corresponding to each of the first and the second elementary codes at a position in accordance with the selection result from the simultaneous decoding selection unit; and a soft-input soft output decoding unit including a plurality of soft-input soft-output decoders that perform soft-input soft-output decoding on each of divided blocks of the first and the second elementary codes in parallel, the soft-input soft output decoding unit configured to repeat decoding of the first elementary code and the second elementary code when simultaneous decoding is not selected by the simultaneous decoding selection unit, and configured to repeat simultaneous decoding of the first and the second elementary codes when simultaneous decoding is selected by the simultaneous decoding selection unit.