A thin film transistor (TFT) array substrate includes a TFT on a substrate, the TFT including an active layer, gate electrode, source electrode, drain electrode, first insulating layer between the active layer and the gate electrode, and second insulating layer between the gate electrode and the source and drain electrodes; a pixel electrode on the first insulating layer and the second insulating layer, the pixel electrode being connected to one of the source electrode and drain electrode; a capacitor including a lower electrode on a same layer as the gate electrode and an upper electrode including the same material as the pixel electrode; a third insulating layer directly between the second insulating layer and the pixel electrode and between the lower electrode and the upper electrode; and a fourth insulating layer covering the source electrode, the drain electrode, and the upper electrode, and exposing the pixel electrode.