发明申请
- 专利标题: Manifold Array Processor
- 专利标题(中): 歧管阵列处理器
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申请号: US13616942申请日: 2012-09-14
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公开(公告)号: US20130019082A1公开(公告)日: 2013-01-17
- 发明人: Gerald G. Pechanek , Charles W. Kurak, JR.
- 申请人: Gerald G. Pechanek , Charles W. Kurak, JR.
- 申请人地址: US CA San Jose
- 专利权人: ALTERA CORPORATION
- 当前专利权人: ALTERA CORPORATION
- 当前专利权人地址: US CA San Jose
- 主分类号: G06F15/80
- IPC分类号: G06F15/80
摘要:
An array processor includes processing elements arranged in to form a rectangular array. Inter-cluster communication paths are mutually exclusive. Due to the mutual exclusivity of the data paths, communications between the processing elements of each cluster may be combined in a single inter-cluster path, thus eliminating half the wiring required for the path. The length of the longest communication path is not directly determined by the overall dimension of the array, as in conventional torus arrays. Rather, the longest communications path is limited by the inter-cluster spacing. Transpose elements of an N×N torus may be combined in clusters and communicate with one another through intra-cluster communications paths. Transpose operation latency is eliminated in this approach. Each PE may have a single transmit port and a single receive port. Thus, the individual PEs are decoupled from the array topology.
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