An embodiment of a testing architecture of integrated circuits on a wafer is described of the type including at least one first circuit of a structure TEG realized in a scribe line providing separation between at least one first and one second integrated circuit. The architecture includes at least one pad shared by a second circuit inside at least one of these first and second integrated circuit and the first circuit, as well as a switching circuitry coupled to the at least one pad and to these first and second circuits.