Invention Application
- Patent Title: SEMICONDUCTOR CHIPS HAVING A DUAL-LAYERED STRUCTURE, PACKAGES HAVING THE SAME, AND METHODS OF FABRICATING THE SEMICONDUCTOR CHIPS AND THE PACKAGES
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Application No.: US13564431Application Date: 2012-08-01
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Publication No.: US20130037942A1Publication Date: 2013-02-14
- Inventor: In Chul HWANG , Jae Myun KIM , Seung Jee KIM , Jin Su LEE
- Applicant: In Chul HWANG , Jae Myun KIM , Seung Jee KIM , Jin Su LEE
- Applicant Address: KR Icheon-si
- Assignee: SK HYNIX INC.
- Current Assignee: SK HYNIX INC.
- Current Assignee Address: KR Icheon-si
- Priority: KR10-2011-0078757 20110808
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/48 ; H01L21/50
Abstract:
Dual-layered structural semiconductor chips are provided. The semiconductor chip includes a first semiconductor chip and a second semiconductor chip bonded to the first semiconductor chip. The first semiconductor chip includes a first substrate having a first bottom surface. The second semiconductor chip includes a second substrate having a second bottom surface. The first bottom surface directly contacts the second bottom surface. The related packages and the related methods are also provided.
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