A tunable impedance circuit can include a fixed impedance and one or more impedance selection circuits. Each impedance selection circuit can include a first impedance connected to a first interface terminal, a second impedance connected to a second interface terminal, and a plurality of series-connected transistors connected between the first and second impedances. Each impedance selection circuit can also include a plurality of drive impedance networks connected to gates, sources, drains, bodies, and isolation regions of the series-connected transistors, and a control circuit to provide a plurality of control signals to the drive impedance networks to turn on and turn off the series-connected transistors. For each impedance selection circuit, turning on and turning off the respective plurality of series-connected transistors can bring the series combination of the respective first and second impedances into and out of electrical communication with, e.g., into and out of parallel with, the fixed impedance.