发明申请
- 专利标题: Pulse Output Circuit, Shift Register and Display Device
- 专利标题(中): 脉冲输出电路,移位寄存器和显示器件
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申请号: US13604709申请日: 2012-09-06
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公开(公告)号: US20130057161A1公开(公告)日: 2013-03-07
- 发明人: Munehiro Azami , Shou Nagao , Yoshifumi Tanada
- 申请人: Munehiro Azami , Shou Nagao , Yoshifumi Tanada
- 申请人地址: JP Atsugi-shi
- 专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人地址: JP Atsugi-shi
- 优先权: JP2001-141347 20010511
- 主分类号: H05B37/02
- IPC分类号: H05B37/02
摘要:
A pulse is input to first and second TFTs to turn ON the first and second TFTs so that the potential of a node α rises. When the potential of the node α reaches (VDD−VthN), the node α enters a floating state. Accordingly, a third TFT then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the third TFT further rises due to an operation of capacitance as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the third TFT.
公开/授权文献
- US08786533B2 Pulse output circuit, shift register and display device 公开/授权日:2014-07-22
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