发明申请
US20130140715A1 Integrated Circuit Having Stress Tuning Layer and Methods of Manufacturing Same
有权
具有应力调谐层的集成电路及其制造方法相同
- 专利标题: Integrated Circuit Having Stress Tuning Layer and Methods of Manufacturing Same
- 专利标题(中): 具有应力调谐层的集成电路及其制造方法相同
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申请号: US13730611申请日: 2012-12-28
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公开(公告)号: US20130140715A1公开(公告)日: 2013-06-06
- 发明人: Shin-Puu Jeng , Clinton Chao , Szu Wei Lu
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L23/52
- IPC分类号: H01L23/52
摘要:
Warpage and breakage of integrated circuit substrates is reduced by compensating for the stress imposed on the substrate by thin films formed on a surface of the substrate. Particularly advantageous for substrates having a thickness substantially less than about 150 μm, a stress-tuning layer is formed on a surface of the substrate to substantially offset or balance stress in the substrate which would otherwise cause the substrate to bend. The substrate includes a plurality of bonding pads on a first surface for electrical connection to other component.
公开/授权文献
- US09275948B2 Integrated circuit having stress tuning layer 公开/授权日:2016-03-01
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