发明申请
US20130140715A1 Integrated Circuit Having Stress Tuning Layer and Methods of Manufacturing Same 有权
具有应力调谐层的集成电路及其制造方法相同

Integrated Circuit Having Stress Tuning Layer and Methods of Manufacturing Same
摘要:
Warpage and breakage of integrated circuit substrates is reduced by compensating for the stress imposed on the substrate by thin films formed on a surface of the substrate. Particularly advantageous for substrates having a thickness substantially less than about 150 μm, a stress-tuning layer is formed on a surface of the substrate to substantially offset or balance stress in the substrate which would otherwise cause the substrate to bend. The substrate includes a plurality of bonding pads on a first surface for electrical connection to other component.
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