发明申请
- 专利标题: SILICON ON INSULATOR INTEGRATED HIGH-CURRENT N TYPE COMBINED SEMICONDUCTOR DEVICE
- 专利标题(中): 绝缘子集成高电流N型组合半导体器件的硅
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申请号: US13819286申请日: 2011-07-11
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公开(公告)号: US20130153956A1公开(公告)日: 2013-06-20
- 发明人: Longxing Shi , Qinsong Qian , Changlong Huo , Weifeng Sun , Shengli Lu
- 申请人: Longxing Shi , Qinsong Qian , Changlong Huo , Weifeng Sun , Shengli Lu
- 申请人地址: CN Jiangsu
- 专利权人: SOUTHEAST UNIVERSITY
- 当前专利权人: SOUTHEAST UNIVERSITY
- 当前专利权人地址: CN Jiangsu
- 优先权: CN201010266405.1 20100827
- 国际申请: PCT/CN2011/077037 WO 20110711
- 主分类号: H01L27/12
- IPC分类号: H01L27/12
摘要:
A silicon on insulator integrated high-current N type combined semiconductor device, which can improve the current density, comprises a P type substrate and a buried oxide layer arranged thereon. A P type epitaxial layer divided into a region I and a region II is arranged on the buried oxide layer. The region I comprises an N type drift region, a P type deep well, an N type buffer well, a P type drain region, an N type source region and a P type body contact region; a field oxide layer and agate oxide layer are arranged on a silicon surface, and a polysilicon lattice is arranged on the gate oxide layer. The region II comprises an N type triode drift region, a P type deep well, an N type triode buffer well, a P type emitting region, an N type base region, an N type source region and a P type body contact region; a field oxide layer and a gate oxide layer are arranged on a silicon surface, and a polysilicon lattice is arranged on the gate oxide layer. It is characterized in that the N type base region is wrapped in the N type buffer region, and the drain electrode metal on the P type drain region is connected with the base electrode metal on the N type base region by a metal layer. In this invention, the current density of the device has been obviously improved without increasing the device area and reducing other performances of the device.
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