发明申请
- 专利标题: Resistive/Residue Charge-to-Digital Timer
- 专利标题(中): 电阻/残留电荷数字定时器
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申请号: US13724182申请日: 2012-12-21
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公开(公告)号: US20130169457A1公开(公告)日: 2013-07-04
- 发明人: Petri Heliö , Johannes Petrus Antonius Frambach , Petri Korpi , Paavo Väänänen
- 申请人: Petri Heliö , Johannes Petrus Antonius Frambach , Petri Korpi , Paavo Väänänen
- 主分类号: H03M1/12
- IPC分类号: H03M1/12 ; H03M1/10
摘要:
A resistive/residual Charge to Digital Timer (RCDT) provides efficient, accurate measurement of short time delay between two signals, by converting the time delay to current, and measuring the charge integrated by a capacitor over a duration. In one embodiment, in quantizing this charge (measured as voltage), a residual charge is maintained cycle-to-cycle. This allows for implementation of a Noise shaping Charge to Digital Timer (NCDT), providing improved resolution over a plurality of measurement cycles. The RCDT/NCDT is particularly (but not exclusively) well suited for phase error detection in a Digital Phase Locked Loop.
公开/授权文献
- US09379729B2 Resistive/residue charge-to-digital timer 公开/授权日:2016-06-28
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