发明申请
US20130173847A1 Metablock Size Reduction Using on Chip Page Swapping Between Planes 有权
使用片上页面交换平面之间的元块大小缩小

Metablock Size Reduction Using on Chip Page Swapping Between Planes
摘要:
Methods and systems are disclosed herein for storing data in a memory device. Data for multiple pages is written in parallel using plane interleaving. For example, in a four plane write, a first set of four pages are written in the following sequence: 0, 1, 2, 3. A second set of four pages, after plane interleaving, are written in the following sequent: 7, 4, 5, 6. After writing the data, the pages of written data are read, page swapped if necessary, and then written into another portion of memory (such as MLC).
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