发明申请
US20130207188A1 JUNCTION BUTTING ON SOI BY RAISED EPITAXIAL STRUCTURE AND METHOD
有权
通过分级外延结构和方法对SOI进行接合
- 专利标题： JUNCTION BUTTING ON SOI BY RAISED EPITAXIAL STRUCTURE AND METHOD
- 专利标题（中）： 通过分级外延结构和方法对SOI进行接合
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申请号： US13369382申请日： 2012-02-09
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公开(公告)号： US20130207188A1公开(公告)日： 2013-08-15
- 发明人: Joseph Ervin , kangguo Cheng , Chengwen Pei , Geng Wang
- 申请人： Joseph Ervin , kangguo Cheng , Chengwen Pei , Geng Wang
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 主分类号： H01L29/786
- IPC分类号： H01L29/786 ; H01L21/336
摘要：
A method of forming a semiconductor device including forming well trenches on opposing sides of a gate structure by removing portions of a semiconductor on insulator (SOI) layer of an semiconductor on insulator (SOI) substrate, wherein the base of the well trenches is provided by a surface of a buried dielectric layer of the SOI substrate and sidewalls of the well trenches are provided by a remaining portion of the SOI layer. Forming a dielectric fill material at the base of the well trenches, wherein the dielectric fill material is in contact with the sidewalls of the well trenches and at least a portion of the surface of the buried dielectric layer that provides the base of the well trenches. Forming a source region and a drain region in the well trenches with an in-situ doped epitaxial semiconductor material.