发明申请
- 专利标题: LAYER 2 AND 3 LATCHING LOOPBACKS ON A PLUGGABLE TRANSCEIVER
- 专利标题(中): 层2和3在可插拔的收发器上挂钩
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申请号: US13783871申请日: 2013-03-04
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公开(公告)号: US20130229927A1公开(公告)日: 2013-09-05
- 发明人: Luc Chouinard , David George Coomber , Richard Charles Vieregge , Emmanuelle Marie Josèphe Janz
- 申请人: Luc Chouinard , David George Coomber , Richard Charles Vieregge , Emmanuelle Marie Josèphe Janz
- 主分类号: H04L12/26
- IPC分类号: H04L12/26
摘要:
A pluggable transceiver, and its use, looping back Layer 2 and higher data in an Ethernet network element. The transceiver has upstream and downstream datapaths, a logic array having first and second complimentary latching loopback logic blocks (LLBLBs) connected in series through both datapaths. The first LLBLB receiving an upstream datapath frame, comparing it to loopback conditions and looping back the frame on the downstream datapath if the conditions match. If the conditions did not match, the frame is sent to the other LLBLB. The first LLBLB receiving a frame from the second LLB and transmitting it on the upstream datapath with priority over any loop back frames to maintain the upstream throughput requirements of the pluggable transceiver. The second LLBLB operates in mirror image with respect to the datapaths.
公开/授权文献
- US09118601B2 Layer 2 and 3 latching loopbacks on a pluggable transceiver 公开/授权日:2015-08-25
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