发明申请
US20130260510A1 3-D Integrated Circuits and Methods of Forming Thereof 审中-公开
3-D集成电路及其形成方法

  • 专利标题: 3-D Integrated Circuits and Methods of Forming Thereof
  • 专利标题(中): 3-D集成电路及其形成方法
  • 申请号: US13437409
    申请日: 2012-04-02
  • 公开(公告)号: US20130260510A1
    公开(公告)日: 2013-10-03
  • 发明人: Horst Theuss
  • 申请人: Horst Theuss
  • 申请人地址: DE Neubiberg
  • 专利权人: INFINEON TECHNOLOGIES AG
  • 当前专利权人: INFINEON TECHNOLOGIES AG
  • 当前专利权人地址: DE Neubiberg
  • 主分类号: H01L21/78
  • IPC分类号: H01L21/78
3-D Integrated Circuits and Methods of Forming Thereof
摘要:
In one embodiment, a method of forming a semiconductor device includes stacking a second wafer with a first wafer and forming a through via extending through the second wafer while the second wafer is stacked with the first wafer. In another embodiment, a method of forming a semiconductor device includes singulating a first wafer into a first plurality of dies and attaching the first plurality of dies over a second wafer having a second plurality of dies. The method further includes forming a through via extending through a die of the first plurality of dies after attaching the first plurality of dies over the second wafer.
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