发明申请
- 专利标题： SOFTWARE AND METHOD FOR VIA SPACING IN A SEMICONDUCTOR DEVICE
- 专利标题（中）： 用于通过半导体器件间隔的软件和方法
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申请号： US13454928申请日： 2012-04-24
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公开(公告)号： US20130280905A1公开(公告)日： 2013-10-24
- 发明人: David S. Doman , Mahbub Rashed , Marc Tarrabia
- 申请人： David S. Doman , Mahbub Rashed , Marc Tarrabia
- 申请人地址： KY Grand Cayman
- 专利权人： GLOBALFOUNDRIES INC.
- 当前专利权人： GLOBALFOUNDRIES INC.
- 当前专利权人地址： KY Grand Cayman
- 主分类号： H01L21/768
- IPC分类号： H01L21/768 ; G06F17/50
摘要：
A computer-readable software product is provided for executing a method of determining the location of a plurality of power rail vias in a semiconductor device. The semiconductor device includes an active region and a power rail. Locations of a first via and a second via are assigned along the power rail. The spacing between the location of the first via and the location of the second via is a minimum spacing allowable. The spacing between the location of the second via and the locations of structures in the active region which may electrically interfere with the second via is determined. The location of the second via is changed in response to the spacing between the location of the second via and the location of one of the structures in the active region being less than a predetermined distance.
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