- 专利标题: CLAMP CIRCUIT AND METHOD FOR CLAMPING VOLTAGE
-
申请号: US13841820申请日: 2013-03-15
-
公开(公告)号: US20130285730A1公开(公告)日: 2013-10-31
- 发明人: Lei Huang , Eric Li
- 申请人: Lei Huang , Eric Li
- 申请人地址: US CA San Jose
- 专利权人: Fairchild Semiconductor Corporation
- 当前专利权人: Fairchild Semiconductor Corporation
- 当前专利权人地址: US CA San Jose
- 优先权: CN201210069342.X 20120315
- 主分类号: H03K5/08
- IPC分类号: H03K5/08
摘要:
The disclosure provides a clamp circuit and a method for clamping voltage. The clamp circuit includes: a first switch control unit, connected with the high-potential terminal of the first stage output of a comparator and configured to clamp the voltage of the high-potential terminal to VGate1 when the voltage of the high-potential terminal is lower than a first pre-set value V1, and a second switch control unit, connected to the low-potential terminal of the first stage output of the comparator and configured to clamp the voltage of the low-potential terminal to VGate2 when the voltage of the low-potential terminal is higher than a second pre-set value V2, wherein the voltages of the first stage output of the comparator are between VGND and VCC. By the disclosure, the output voltage swings of the first stage of the comparator are limited, and thereby the processing speed of the comparator is improved.
公开/授权文献
- US09077324B2 Clamp circuit and method for clamping voltage 公开/授权日:2015-07-07
信息查询
IPC分类: