Invention Application
- Patent Title: SONOS ONO STACK SCALING
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Application No.: US13539461Application Date: 2012-07-01
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Publication No.: US20130307052A1Publication Date: 2013-11-21
- Inventor: Fredrick JENNE , Sagy LEVY , Krishnaswamy RAMKUMAR
- Applicant: Fredrick JENNE , Sagy LEVY , Krishnaswamy RAMKUMAR
- Applicant Address: US CA San Jose
- Assignee: CYPRESS SEMICONDUCTOR CORPORATION
- Current Assignee: CYPRESS SEMICONDUCTOR CORPORATION
- Current Assignee Address: US CA San Jose
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/792

Abstract:
A method of scaling a nonvolatile trapped-charge memory device and the device made thereby is provided. In an embodiment, the method includes forming a channel region including polysilicon electrically connecting a source region and a drain region in a substrate. A tunneling layer is formed on the substrate over the channel region by oxidizing the substrate to form an oxide film and nitridizing the oxide film. A multi-layer charge trapping layer including an oxygen-rich first layer and an oxygen-lean second layer is formed on the tunneling layer, and a blocking layer deposited on the multi-layer charge trapping layer. In one embodiment, the method further includes a dilute wet oxidation to densify a deposited blocking oxide and to oxidize a portion of the oxygen-lean second layer.
Public/Granted literature
- US09299568B2 SONOS ONO stack scaling Public/Granted day:2016-03-29
Information query
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