发明申请
- 专利标题： CONTROLLING A VOLTAGE LEVEL OF AN ACCESS SIGNAL TO REDUCE ACCESS DISTURBS IN SEMICONDUCTOR MEMORIES
- 专利标题（中）： 控制电源电压降低半导体存储器中的访问干扰
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申请号： US13476218申请日： 2012-05-21
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公开(公告)号： US20130308407A1公开(公告)日： 2013-11-21
- 发明人: Amaranth Shyanmugam , Bikas Maiti , Vincent Philippe Schuppe , Yew Keong Chong , Martin Jay Kinkade , Hsin-Yu Chen
- 申请人： Amaranth Shyanmugam , Bikas Maiti , Vincent Philippe Schuppe , Yew Keong Chong , Martin Jay Kinkade , Hsin-Yu Chen
- 申请人地址： GB Cambridge
- 专利权人： ARM LIMITED
- 当前专利权人： ARM LIMITED
- 当前专利权人地址： GB Cambridge
- 主分类号： G11C5/14
- IPC分类号： G11C5/14
摘要：
A semiconductor memory storage device having a plurality of storage cells for storing data, each storage cell comprising an access control device and access control circuitry. The access control circuitry is configured to respond to a data access request signal to access a selected storage cell connected to a corresponding selected access control line to: control the voltage control switching circuitry to connect the at least one capacitor to the voltage supply line such that the at least one capacitor is charged by the voltage supply line and a voltage level on the voltage supply line is reduced; and to control the access control line switching circuitry to connect the selected access control line to the voltage supply line having the reduced voltage level.
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