发明申请
- 专利标题： INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUBSTRATE AND METHOD OF MANUFACTURE THEREOF
- 专利标题（中）： 具有基板的集成电路包装系统及其制造方法
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申请号： US13842582申请日： 2013-03-15
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公开(公告)号： US20130320525A1公开(公告)日： 2013-12-05
- 发明人: Yaojian Lin , Il Kwon Shim , JunMo Koo , Jose Alvin Caparas
- 申请人： Yaojian Lin , Il Kwon Shim , JunMo Koo , Jose Alvin Caparas
- 主分类号： H01L23/498
- IPC分类号： H01L23/498 ; H01L21/768
摘要：
An integrated circuit packaging system and method of manufacture thereof includes: a substrate having a top insulation layer and a top conductive layer; an inter-react layer on the substrate; an integrated circuit die on the substrate; a package body on the inter-react layer and the integrated circuit die; and a top solder bump on the top conductive layer, the top solder bump in a 3D via formed through the package body, the inter-react layer, and the top insulation layer for exposing the top conductive layer in the 3D via.
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