Invention Application
- Patent Title: Non-Volatile Semiconductor Memory with Page Erase
- Patent Title (中): 非易失性半导体存储器,具有页擦除
-
Application No.: US13969184Application Date: 2013-08-16
-
Publication No.: US20130336063A1Publication Date: 2013-12-19
- Inventor: Jin-Ki Kim
- Applicant: MOSAID Technologies Incorporated
- Applicant Address: CA Ottawa
- Assignee: MOSAID Technologies Incorporated
- Current Assignee: MOSAID Technologies Incorporated
- Current Assignee Address: CA Ottawa
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
In a nonvolatile memory, less than a full block maybe erased as one or more pages. A select voltage is applied through pass transistors to each of plural selected wordlines and an unselect voltage is applied through pass transistor to each of plural unselected wordlines of a selected block. A substrate voltage is applied to the substrate of the selected block. A common select voltage may be applied to each selected wordline and the common unselect voltage may be applied to each unselected wordline. Select and unselect voltages may be applied to any of the wordlines of a select block. A page erase verify operation may be applied to a block having plural erased pages and plural nonerased pages.
Information query